As electronic components are becoming smaller and smaller along with the internal structures in integrated circuits, it is becoming easier to either completely destroy or otherwise impair electronic components. In particular, many integrated circuits are highly susceptible to damage from the discharge of static electricity. Generally, electrostatic discharge (ESD) is the transfer of an electrostatic charge between bodies at different electrostatic potentials or voltages, caused by direct contact or induced by an electrostatic field. The discharge of static electricity, or ESD, has become a critical problem for the electronics industry.
Device failures resulting from ESD events are not always immediately catastrophic or apparent. Often, the device is only slightly weakened but is less able to withstand normal operating stresses. Such a weakened device may result in reliability problems. Therefore, various ESD protection circuits are typically included in circuits to protect its various components.
Stacked MOS clamping devices are commonly used for ESD protection. These devices typically utilize a stack of one or more MOS devices that are dynamically triggered by a fast ESD transient, but do not conduct current during normal operation. Stacked MOS power clamps are used, for example, in circuits having multiple power domains. For example, one power domain dedicated for I/O circuit may operate using a 3.3V power supply while another power domain dedicated for processing logic may operate at 1.8V using small, fast, low-voltage transistors that breakdown at the higher supply voltage. Generally, supply nodes and I/O pins are protected using stacked MOS clamps to prevent device destruction because of a momentary high voltage.